Field
The disclosed technology generally relates to integrated circuit devices, and more particularly to a metal-insulator-metal capacitor integrated as part of a back-end-of-line (BEOL) of the integrated circuit devices.
Description of the Related Technology
The physical scaling of device dimensions in CMOS technology continues to enable faster computing speeds, lower power consumption, higher device densities and/or lower cost, among other benefits. However, such benefits of physical scaling are often realized with increasing challenges and trade-offs. For example, in the fabricated device, large current spikes may occur due to a large number of ‘simultaneous’ switching events in the circuit within a short period of time, which can cause considerable current-resistance drop and noise over the power supply network. Voltage fluctuation and power supply noise may impact signal integrity, speed and reliability of the fabricated devices. Under some circumstances, an on-chip decoupling MIMCAP (metal-insulator-metal capacitor) can alleviate this and other problems and enhance circuit performance. For example, an on-chip MIMCAP can compensate voltage fluctuations by delivering charges to the power-supply network. However, integrating such MIMCAPs having desirable electrical properties without unacceptably increasing the overall footprint of the integrated circuit poses many challenges. For example, to increase the capacitance and thereby enhance the device performance, the thickness of the dielectric can be decreased, or alternatively a higher-k dielectric can be used. However, both of these approaches to increasing capacitance can be accompanied by an increase in leakage currents, a decrease in breakdown voltage and/or a deterioration of voltage linearity, among other possible undesirable results. To mitigate these undesirable effects, the MIMCAPs can be three-dimensionally integrated, e.g., to increase effective MIM area and related capacitance density. However, for high frequency applications, the efficiency of a capacitor is largely dependent on its serial resistance, which can depend on, e.g., how the capacitor is connected to the circuit.
Present-day approaches to lowering the series resistance include doping of silicon areas in contact with the MIMCAP. However, this approach cannot reach the low resistance values of a metal (Cu) connection. Integration of 3D-MIMCAPs into a BEOL process has been described, e.g. in US20050266652 and US20080050874. However, these techniques involve 3-dimensional patterning of both the bottom and top electrode of the MIMCAP, which is a complex process which poses undesirable limits on the aspect ratio of the 3D structures, thereby limiting the achievable capacitance density.